Write your Feed Back
Sipeed TANG PriMER FPGA Dev. Board features Anlogic EG4S20 FPGA unrelated to Amlogic which runs a RISC-V softcore, and all is packaged in a small form factor.
Specifications
| Core unit | Anlogic Technologies EG4S20 |
| Logical unit | 20K (LUT4/LUT5 hybrid architecture) |
| SRAM | About 130KB |
| SDRAM | Built-in 32bit bit width 64MBit |
| Flash | FPGA configuration Flash, 8Mbit User Flash, nor/nand optional |
| Shipment Weight | 0.08 kg |
Features:
Interface:
- FPC40P socket can be connected to RGB LCD, the VGA adapter board
- FPC24P socket can be connected to DVP camera, high-speed ADC module
- Resistive touch screen controller for I2C interface, used with RGB LCD
Pin and lead:
- The adjacent pins LVDS are drawn in the same length, leading out 8 GCLKs, and all 8 ADCs are taken out.
- Double row pin spacing 900mil, compatible with breadboard development
- The half-hole leads to an extra 40 IO, and the whole board leads to 130+ IO
Electrical characteristics:
- Micro USB 5V power supply; 2.54mm pin
- 3.3V~5V power supply; 1.27mm stamp hole power supply
- 3-channel DCDC power supply chip, stable and efficient power supply
- independent adjustment of Bank0 IO level
Package Includes:
- 1 x Sipeed TANG PriMER FPGA Dev. Board
